[LAD] jackd buffersize
Jens M Andreasen
jens.andreasen at comhem.se
Mon May 11 15:54:36 UTC 2009
On Mon, 2009-05-11 at 11:43 -0400, Paul Davis wrote:
> On Mon, May 11, 2009 at 11:37 AM, Jens M Andreasen
> <jens.andreasen at comhem.se> wrote:
> > On Mon, 2009-05-11 at 11:29 -0400, Paul Davis wrote:
> >> the point of making things cache aligned relates to SSE(2).
> > SSE wants 128 bit alignment not 1024.
> which changes my point in what way?
That buffers of 96 floats are perfectly aligned with SSE although
perhaps not with the cacheline.
If it indeed is SSE that gives the performance advantage rather than the
caheline, then the rules can be relaxed from powers of 2 to multiples of
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