[LAD] Strange Jack1 problem

[Fons Adriaensen]

On Sun, Aug 09, 2015 at 03:01:06PM -0400, Paul Davis wrote:

> Because I can't tell what jack_delay actually does anymore, and
> because the output of jack_iodelay is deliberately and intentionally
> different.

In this case both gave the same result (as n2j and j2n have their
port latencies set to zero).

Anyway this is irrelevant. The delay change was just a hint that
something was wrong.

As already said the setup was 

  zita-n2j -> jack_(io)delay -> zita-j2n

and there were no other connenctions to any of them.

So the order of execution within each cycle should be
left to right.

As already said the measured delay alternated between the correct
value and the same plus one period. In the latter case j2n was
run *before* n2j in each cycle. See original post for details on
how this was verified.


Ciao,

-- 
FA

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