[linux-audio-user] Is everyone sick of interrupts yet?

[Lee Revell]

On Tue, 2004-09-28 at 20:52, Mark Knecht wrote:
> On Tue, 2004-09-28 at 17:05, Lee Revell wrote:
> 
> > Correct.  I have measured the delay, is it a matter of a few
> > nanoseconds.  
> 
> I don't mean to be argumentative but it cannot be. A single PCI clock
> cycle is 30nS @33MHz. It takes dozens of PCI cycles for the chipset to
> ensure access to the bus (removing PCI grant and waiting until all
> devices are off, then sending a PCI address, getting a target hit
> response and starting the read. At that point you can read a single
> register, or possibly multiple registers if the chip supports it. This
> is not a few nanosecond. A few micro seconds to read a single Interrutp
> register in a PCI chip to see if it's involved, but not nanoseconds.
> Most North Bridges cannot access the PCI bus for fewer than about 15
> clocks by the time you look at their bus operations. We do this stuff
> all the time in our PCI 1394 drivers looking at IO's/Sec. PCI-Express
> maybe, but not PCI.
> 
> If you're talking about the speed reading the PCI itself, then I'd buy
> that this is much shorter as it's in the chipset. However, the processor
> still has to cross the front side bus. There are latencies that arise
> there dependign on what the processoris doing physically. Certainly this
> time is much shorter though.

Oops, sorry, I meant microseconds.  I was actually looking at a trace
when I wrote this, and Ingo's tracer prints milliseconds, and I screwed
up the conversion.  It looks like 2-3 usecs to determine where the
interrupt came from if two devices share an irq. 

Lee