[LAD] How is the TSC calibration accuracy on dual core 2 computers? (And what about HPET?)
steve at plugin.org.uk
Tue Apr 28 17:02:08 UTC 2009
I don't know about jitter, but certainly a few years ago, you
sometimes got stalls - eg. under heavy DMA load. That may not be an
issue with modern CPUs and chipsets. I think I posted some code that
demonstrated it to the l-a-d list at the time, but good luck finding
The TSC is only required to be monotonic, so you wont get any
guarantees, just practical knowledge of whether you can get away with
it or not.
On 28 Apr 2009, at 13:46, Kjetil S. Matheussen wrote:
> I'm doing some benchmarking where I need about 0.1ms accuracy.
> I'm using an intel dual core 2 computer. This is for a paper,
> so I just need the numbers, and the code is not going to run
> on any other computer.
> I've looked at the HPET code in jack, but am unsure how accurate it
> and whether there are any overhead using it?
> And I have also tried using tsc. tsc seems to work perfectly,
> but I don't know how accurate it is on intel dual core machines?
> Testing the accuracy of tsc by bounding my thread to one processor
> using sched_setaffinity and using usleep(), and comparing
> with code which is forced to switch to read the tsc value from the
> other CPU, shows that the accuracy of tsc when reading and writing
> using two different CPUs is below 1ms since
> that's the accuracy of usleep(). So it looks promising, but
> I need at least 0.1ms accuracy...
> Anyone know how much jitter there might be for tsc?
> I've not found anything on google yet.
>  __asm__ __volatile__("rdtsc" : "=A" (ret))
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