Re: [LAD] a *simple* ring buffer, comments pls?

On Sun, Jul 10, 2011 at 5:14 PM, Fons Adriaensen <fons(a)linuxaudio.org> wrote: i may be way out of the loop, but having worked with some of the early "massively" parallel "conventional processor" systems of the late 80's and early 90's (such as the sequent symmetry and the kendall square research machines), my impression was that everyone gave up on "clever" cache coherency because it turned out to be too hard (as an engineering problem, not as a CS problem). i've gotten stuck with the idea that the industry went for "simple" cache coherency that simply does what any moderately skilled designer would do when faced with the problem and no concerns about elegance or speed: locks, signalling, and all the usual stuff that is the h/w equiivalent of the pthreads mutex API. do we have SMP systems these days that do not guarantee cache coherency? btw: i do understand that whether they do or do not doesn't affect the basic point about cache coherency possibly leading to incorrect data being read.