11 May
2009
11 May
'09
3:55 p.m.
Paul Davis wrote:
However, notice that far more important from a
performance perspective
is that power-of-2 buffer sizes permit buffers to be cache line
aligned, which as far as we know (its never been carefully measured)
greatly outweighs the kinds of concerns you are mentioning.
I did some testing on this in past when developing bunch on SSE
routines. The performance difference was around 2x.
- Jussi