On Tue, Dec 10, 2002 at 03:08:01 +0100, Tim Goetze wrote:
it'd still be interesting to know how the sync
problems this
method poses are solved: you cannot rely on executable code
modifications to be atomic. an indirect jump instruction is
not guaranteed to work ok: a pointer on x86 is 32 bits, and
atomic is 24 bits (besides, indirect jumps have ill influence
on the cache). could do this with branching though -- but you
don't want your dsp code interspersed with volatile if()s.
By sync problemt do you mean loop latency? There not solved exactly its
just that the loop latency is 1 sample, so it becomes (generally)
insgnificant. To the extent that its lo longer neccesary (or desirable) to
do graph dependent ordering.
As you know the latency is one sample you can do intersting tricks with
module placement and mixing.
- Steve