>Also,
several people have referred to the atomicity of int/pointer
>read/write. This is news to me - can someone point me at the spec for this
?
its an architecture-specific issue. its not true on SPARCs and on some
NUMA systems. it has nothing to do with a language per se.
Is it really true on x86? Being that you can do unaligned accesses just
fine, you can certainly do cross-cacheline accesses. Pardon the skepticism,
but I've never heard such assertions before. Can anyone offer me a
specification for this?
nope. i can tell you, however, that x86 does not allow any cache
incoherency at all. but i can't point you at a spec for that either.