18 Jun
2004
18 Jun
'04
2:34 a.m.
On Thu, Jun 17, 2004 at 08:22:29PM -0700, Joshua Haberman wrote:
One final thing: I'm not sure if this is a problem
in practice, but
most (if not all) processors do not guarantee that memory reads and
writes are performed in order, as observed by other processors and by
I/O devices. This could theoretically lead to a problem where the
stores that write data to the ring buffer are not performed until
*after* the store that updates your write pointer. Your reader thread
could get old data rather than the data your just wrote. To guarantee
that the loads and stores are observed in the required order, you have
to use memory barriers (again, in theory). See:
Yes, this was discussed here a while back. For all practical platforms
that the developers cared about, 32 bit aligned access are atomic.
They are not guaranteed to STAY that way, but for now..