27 Aug
2013
27 Aug
'13
7:53 p.m.
[Burkhard Ritter]
I've considered different approaches (separate data
for each thread,
various versions of shared data), but I believe all of them make at
least two assumptions: That reading and writing byte-sized data (e.g.
a bool flag) and that updating pointers is atomic. I got a bit
confused reading this thread [2]. Are these assumptions correct?
It's been a while since I did some research: IIrc on i386, 32-bit read
or write access is atomic if the variable address is 32-bit aligned,
while on ARM only byte-size read and write operations are atomic,
regardless of alignment. (On a sidenote, it is not realistic to
expect gcc to honour alignment instructions.)
However, you're probably well-advised not to take my word on it. You
better research this thoroughly yourself before designing your
multithreaded architecture around it. You might go weeks before
encountering a problem, and then you might spend a week trying to hunt
it down as these things are often very difficult to recreate and
isolate, and then you might discover your basic assumptions were
wrong.
For passing data between threads locklessly in a deterministic manner,
I'd recommend a FIFO, which you can build with byte-sized counters.
Hope this helps,
Tim