19 Jul
2004
19 Jul
'04
9:52 a.m.
* Ingo Molnar <mingo(a)elte.hu> wrote:
ATA hardirq latency can be as high as 700 usecs under
load even on
modern hw, when big DMA requests are created with long scatter-gather
lists. We also moved some of the page IO completion code into irq
context which further increased hardirq latencies. Since these all
touch cold cachelines it all adds up quite quickly.
typically all of this happens with irqs enabled (unmask=1), but it still
increases scheduling latencies.
with the default DMA setup of today's ATA hw there can be a maximum of
256 entries in the sg-table all zapped in ide_end_request() ->
__end_that_request_first().
Plus the IDE driver also builds the sg-table of the next request in
hardirq context. (ide_build_dmatable() and ide_build_sglist()).
Ingo