3 Feb
2013
3 Feb
'13
4:39 p.m.
On 02/02/13 07:32, Charles Z Henry wrote:
One topic of research where I'm at (ITTC/KU) concerns compilation from
Haskell (a relational language) to verilog or vhdl for synthesis on
fpga's--not going through the usual chain of defining a processor but
actually building the specific functions (greater utilization this way as I
understood it). Maybe someday Faust (the audio relational language) will
have a similar compiler target like this too
have you seen this:
http://haskell.cs.yale.edu/euterpea-2/
so the combination of using Euterpea in Haskell then compiling to vhdl or
verilog seems quite promising, and possibly a way to make audio use of FPGAs in
the context of a language that may be a more natural way to write for logic
implementations than many. I suspect Haskell's style of functional language and
the very serious efforts working with compilers for it could lead somewhere.
It's been on my TODO list for a few months now, recommended by my lecturer for
Programming Paradigms (we used F#), but the compiling to vhdl is news ... too
much to look at, too little time!
Simon