On Sat, 2008-10-18 at 19:13 +0200, Joern Nettingsmeier wrote:
Paul Davis wrote:
The test that Olivier has written is essentially
a no-op on a
uniprocessor x86 system, because there are no cache coherency issues.
The code *is* thread safe on a uniprocessor because of the logic above,
not because we rely on instruction reordering/memory barrier processor
behaviour.
i haven't thought much about this issue, but the fact that i got a
failure on an uniprocessor athlon64 seems to contradict your statement:
in which case i should shut up now, since this implies that i don't know
enough about what is going on here.