Re: [LAU] CPUs for low latency

On 12/20/2015 06:20 PM, Len Ovens wrote: [..] Note that these plots are the best-case. While cyclictest can load the CPU, it does not perform any FPU computation as DSP would. It's very application specific, HT can reduce latency for some workloads: mainly application with many branches that cause instruction cache misses. Digital Signal Processing however requires complete attention of the CPU core and does not usually stall (at least well written DSP optimizes code loops and branches to take instruction fetch into account). In this case Hyperthreading leads to increased latency since two DSP threads on the same CPU compete with each other. Intel-Research published a paper about this: https://software.intel.com/en-us/articles/performance-insights-to-intel-hyp… +1 for testing + measuring. Anyway. In most cases the CPU is not the limiting factor. In the vast majority of cases some power-saving (bus-freq, southbridge, SMI) or weird graphics-cards, wifi, etc and/or their drivers are orders of magnitude more limiting. 2c, robin