10 Aug
2004
10 Aug
'04
5:34 p.m.
On Tue, Aug 10, 2004 at 10:33:56PM +0200, Florian Schmidt wrote:
i get to the conclusion that there indeed was a
hierarchy of IRQ's in
the traditional IRQ handlers in linux. I think this priority is located
in the PIC itself. I just don't know exactly how to understand the
implications. Does this priority only apply to irqs which happen to
happen on the exact same pci bus cycle?
I think ithere's a bigger window than that. If two IRQs happen any time
while interrupts are disabled during the service routine for another
interrupt, the higher priority one gets executed when interrupts
are re-enabled.
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