7 Jan
2004
7 Jan
'04
8:32 p.m.
Based on the fact that the following line is the second last displayed
by dmsg, I presume my intel i810 is set to a sample rate of 48000:
intel8x0: clocking to 48000
I also presume this is not optimal and should be changed to 44100,
right? Where is this done?
I run debian/unstable on both 2.4.23-low-latency-patched and 2.6.0/1
kernels with the latest alsa on 2.4 and the build in alsa in 2.6. Please
bear with me, but I don't really know which config files to post....
Thanks in advance.
--
peace, love & harmony
Atte
http://www.atte.dk
7 Jan
7 Jan
8:46 p.m.
I'm not sure if it is the case for that card but I do know that an
Ensoniq PCI card will run better at 48000 than at 44100. A lot of the
lower end cards have a set sample rate of 48000 and have to do more
processing to sample at 44100. I ran tests on my ens1371 and I got many
more xruns at 44100 than at 48000. So, the bottom line is that 48000
*may*, in fact, be optimal.
Jan
On Wed, 2004-01-07 at 18:29, Atte André Jensen wrote:
Based on the fact that the following line is the
second last displayed
by dmsg, I presume my intel i810 is set to a sample rate of 48000:
intel8x0: clocking to 48000
I also presume this is not optimal and should be changed to 44100,
right? Where is this done?
I run debian/unstable on both 2.4.23-low-latency-patched and 2.6.0/1
kernels with the latest alsa on 2.4 and the build in alsa in 2.6. Please
bear with me, but I don't really know which config files to post....
Thanks in advance.
--
peace, love & harmony
Atte
http://www.atte.dk
9 Jan
9 Jan
5:40 a.m.
Jan Depner wrote:
<snip> So, the bottom line is that 48000
*may*, in fact, be optimal.
Thanks guys, I'll leave it at 48000 then :-)
--
peace, love & harmony
Atte
http://www.atte.dk
8 Jan
8 Jan
5:40 a.m.
Atte André Jensen wrote:
Based on the fact that the following line is the
second last displayed
by dmsg, I presume my intel i810 is set to a sample rate of 48000:
intel8x0: clocking to 48000
This is the clock of the AC'97 bus which connects the AC'97 controller
(the southbridge) with the codec. This doesn't restrict the actual
sample rates you can use.
I also presume this is not optimal and should be
changed to 44100,
right?
The AC'97 specification says that the bus _must_ use 48 kHz.
Where is this done?
It's possible to change this value, but this is done only for broken
motherboards which use the AC'97 bus at a non-conforming speed. (And
this setting does _not_ change the clock, it simply tells ALSA what
the actual clock speed is.)
HTH
Clemens
7614
days inactive
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3 comments
3 participants
participants (3)
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Atte André Jensen -
Clemens Ladisch -
Jan Depner